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Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: Ammareal, Morangis, France
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Hardcover. Condition: Très bon. Ancien livre de bibliothèque. Petite(s) trace(s) de pliure sur la couverture. Edition 1994. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Very good. Former library book. Slightly creased cover. Edition 1994. Ammareal gives back up to 15% of this item's net price to charity organizations.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: thebookforest.com, San Rafael, CA, U.S.A.
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Condition: LikeNew. Page block firm and clean, binding unblemished, boards straight, no markings of any kind. Fine, like new condition. Well packaged and promptly shipped from California. Partnered with Friends of the Library since 2010.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: booksXpress, Bayonne, NJ, U.S.A.
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Hardcover. Condition: new.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: Lucky's Textbooks, Dallas, TX, U.S.A.
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Condition: New.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: Ria Christie Collections, Uxbridge, United Kingdom
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Published by Springer US, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: moluna, Greven, Germany
Book Print on Demand
Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requirements for any ker.
Published by Springer US, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: AHA-BUCH GmbH, Einbeck, Germany
Book
Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
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Hardback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.
Published by Springer US Mai 1994, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
Book Print on Demand
Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966. 300 pp. Englisch.
Published by Springer, 1994
ISBN 10: 0792394518ISBN 13: 9780792394518
Seller: Mispah books, Redhill, SURRE, United Kingdom
Book
Hardcover. Condition: Like New. Like New. book.